In recent years, a flat display panel has been developed replace the CRT display. Particularly, a liquid crystal display has received a great deal of attention due to its lightweight, low profile compactness and low power consumption. More particularly, in an active matrix liquid crystal display device, the FFS (fringe field switching) mode liquid crystal display has attracted attention. A conventional construction of this type is disclosed in Japanese laid-open patent application No. P2006-317962.
On the other hand, silicon (e.g. amorphous silicon and poly-silicon) technology has been applied to a liquid crystal display panel as switching elements in pixels or driving circuits, in order to enable fabrication on a transparent substrate by CVD (chemical vapor deposition).
A conventional method of producing an array substrate using poly-silicon as switching elements will be described.
First, a semiconductor film made of amorphous silicon is disposed on an insulating substrate by CVD. Next, the semiconductor film is instantaneously heated by excimer laser annealing (ELA) so as to be converted into a polycrystalline silicon and is patterned by CDE (Chemical Dry Etching). Then, a gate insulating film and a metal film are disposed on the insulating substrate by sputtering so as to cover the semiconductor film. Next, gate electrodes are formed by RIE (Reactive Ion Etching). Then, source regions and drain regions are formed in the semiconductor film by ion implantation doping using the gate electrodes or a resin as a photo mask.
Next, an interlayer insulating film is disposed on the insulating substrate so as to cover the gate electrodes and the gate insulating film. Moreover, source electrodes and drain electrodes electrically connected to the source and drain regions of the semiconductor film are formed on the interlayer insulating film.
After that, a first organic insulating film having a first contact hole, which is located on the drain electrode, is formed by patterning a photoresist layer on the insulating substrate. Next, a common electrode is formed on the first organic insulating film, and a second organic insulating film having a second contact hole is formed by patterning a photoresist layer on the first organic insulating film and the common electrode. Then, a pixel electrode which is electrically connected to the drain electrode via the first and second contact holes is formed on the second organic insulating film.
Thus, the second contact hole overlies the first contact hole on the drain electrode. Therefore, the total depth of the contact hole to connect the drain electrode to the pixel electrode is the thickness of the first and second organic insulating films. Hence, the depth of the contact hole increases.
Accordingly, some portions of photoresist film of the second organic insulating film are not dissolved in a developer and may remain in the contact hole. The remaining photoresist increases electric resistance between the drain electrode and the pixel electrode and causes a bad connection therebetween.